Visitors

Faculty

Dr. Isuru Dasanayake

Dr. Isuru Dasanayake is a Senior Lecturer in the Department of Electrical & Electronic Engineering, Faculty of Engineering, University of Peradeniya. Before this role, he was employed at Sri Lanka Telecom, the University of California Santa Barbara in the USA, and Intel Corporation USA. He holds a B.Sc. Engg degree from the University of Peradeniya, Sri Lanka, and has earned both M.Sc. and Ph.D. degrees from Washington University in St. Louis, USA. His research focuses on optimization for large-scale systems, theoretical neuroscience, neuromorphic computing, and electronics.

Students

Project Title: 8b/10b Encoder and Decoder Design (2016)

Project Title: Device/Circuit Co-Design for Robust SRAM  (2016)

Project Title: IoT Enabled Smart Vending Machine (2016)

Project Title: Modeling and Simulation of Multigate MOSFET in Quantum Domain. (2015)

Project Title: Modeling and Simulation of Double Gate Tunnel FET (2015) 

Project Title: Graphene FET Modeling for Circuit Design (2015)

Project Title: Offset Analysis and Minimization Techniques of MOSFET in SRAM (2015)

Project Title: Modeling and Analysis of Multigate and its applications in Standard Cell design (2015)

Project Title: Memory Circuit Design and its performance evaluation using novel devices  for low power applications (2015)

Project Title: Design & Analysis of FLASH Memory Device (2015)

Project Title: Design & Analysis of FLASH Memory Device (2015)

Project Title: Graphene FET Modeling (2014)

Project Title: Capacitorless Memory Cell Based on GaN/AlGaN/GaN heterostructures (2013)